? semiconductor components industries, llc, 2008 april, 2008 ? rev. 0 1 publication order number: nst3904dp6/d NST3904DP6T5G dual general purpose transistor the NST3904DP6T5G device is a spin ? off of our popular sot ? 23/sot ? 323/sot ? 563 three ? leaded device. it is designed for general purpose amplifier applications and is housed in the sot ? 963 six ? leaded surface mount package. by putting two discrete devices in one package, this device is ideal for low ? power surface mount applications where board space is at a premium. features ? h fe , 100 ? 300 ? low v ce(sat) , 0.4 v ? simplifies circuit design ? reduces board space ? reduces component count ? this is a pb ? free device maximum ratings rating symbol value unit collector ? emitter voltage v ceo 40 vdc collector ? base voltage v cbo 60 vdc emitter ? base voltage v ebo 6.0 vdc collector current ? continuous i c 200 madc electrostatic discharge hbm mm esd class 2 b thermal characteristics characteristic (single heated) symbol max unit total device dissipation t a = 25 c derate above 25 c (note 1) p d 240 1.9 mw mw/ c thermal resistance, junction-to-ambient (note 1) r ja 520 c/w total device dissipation t a = 25 c derate above 25 c (note 2) p d 280 2.2 mw mw/ c thermal resistance, junction-to-ambient (note 2) r ja 446 c/w characteristic (dual heated) (note 3) symbol max unit total device dissipation t a = 25 c derate above 25 c (note 1) p d 350 2.8 mw mw/ c thermal resistance, junction-to-ambient (note 1) r ja 357 c/w total device dissipation t a = 25 c derate above 25 c (note 2) p d 420 3.4 mw mw/ c thermal resistance, junction-to-ambient (note 2) r ja 297 c/w junction and storage temperature range t j , t stg ? 55 to +150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. fr ? 4 @ 100 mm 2 , 1 oz. copper traces, still air. 2. fr ? 4 @ 500 mm 2 , 1 oz. copper traces, still air. 3. dual heated values assume total power is sum of two equally powered channels. sot ? 963 case 527ad plastic 1 q 1 (1) (2) (3) (4) (5) (6) q 2 NST3904DP6T5G ordering information http://onsemi.com marking diagram device package shipping ? NST3904DP6T5G sot ? 963 (pb ? free) 8000/tape & reel e = device code m = date code = pb ? free package e m 1 ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d. (note: microdot may be in either location) 2 3 1 5 4 6
NST3904DP6T5G http://onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) characteristic symbol min max unit off characteristics collector ? emitter breakdown voltage (note 4) (i c = 1.0 madc, i b = 0) v (br)ceo 40 ? vdc collector ? base breakdown voltage (i c = 10 adc, i e = 0) v (br)cbo 60 ? vdc emitter ? base breakdown voltage (i e = 10 adc, i c = 0) v (br)ebo 6.0 ? vdc collector cutoff current (v ce = 30 vdc, v eb = 3.0 vdc) i cex ? 50 nadc on characteristics (note 4) dc current gain (i c = 0.1 madc, v ce = 1.0 vdc) (i c = 1.0 madc, v ce = 1.0 vdc) (i c = 10 madc, v ce = 1.0 vdc) (i c = 50 madc, v ce = 1.0 vdc) (i c = 100 madc, v ce = 1.0 vdc) h fe 40 70 100 60 30 ? ? 300 ? ? ? collector ? emitter saturation voltage (i c = 10 madc, i b = 1.0 madc) (i c = 50 madc, i b = 5.0 madc) v ce(sat) ? ? 0.2 0.3 vdc base ? emitter saturation voltage (i c = 10 madc, i b = 1.0 madc) (i c = 50 madc, i b = 5.0 madc) v be(sat) 0.65 ? 0.85 0.95 vdc small ? signal characteristics current ? gain ? bandwidth product (i c = 10 madc, v ce = 20 vdc, f = 100 mhz) f t 200 ? mhz output capacitance (v cb = 5.0 vdc, i e = 0, f = 1.0 mhz) c obo ? 4.0 pf input capacitance (v eb = 0.5 vdc, i c = 0, f = 1.0 mhz) c ibo ? 8.0 pf noise figure (v ce = 5.0 vdc, i c = 100 adc, r s = 1.0 k , f = 1.0 khz) nf ? 5.0 db switching characteristics delay time (v cc = 3.0 vdc, v be = ? 0.5 vdc) t d ? 35 ns rise time (i c = 10 madc, i b1 = 1.0 madc) t r ? 35 storage time (v cc = 3.0 vdc, i c = 10 madc) t s ? 275 ns fall time (i b1 = i b2 = 1.0 madc) t f ? 50 4. pulse test: pulse width 300 s; duty cycle 2.0%. 50 0 400 0.0001 1 0.03 i c , collector current (a) figure 1. collector emitter saturation voltage vs. collector current figure 2. dc current gain vs. collector current 0.28 0.0001 0.01 1 i c , collector current (a) 0.08 0.001 0.13 250 300 350 v ce(sat) , collector ? emitter saturation voltage (v) 0.18 0.23 i c /i b = 10 v ce(sat) = 150 c 0.1 0.01 0.001 25 c ? 55 c 200 h fe , dc current gain (v) 150 100 0.1 150 c (5.0 v) 150 c (1.0 v) 25 c (5.0 v) 25 c (1.0 v) ? 55 c (5.0 v) ? 55 c (1.0 v)
NST3904DP6T5G http://onsemi.com 3 figure 3. base emitter saturation voltage vs. collector current figure 4. base emitter turn ? on voltage vs. collector current i c , collector current (a) i c , collector current (a) 1 0.1 0.01 0.001 0.0001 0.3 0.4 0.5 0.6 0.8 0.9 1.0 1.1 1 0.1 0.01 0.001 0.0001 0.3 0.4 0.5 0.6 0.7 0.9 1.0 1.1 figure 5. saturation region figure 6. input capacitance i b , base current (a) v eb , emitter base voltage (v) 0.01 0.001 0.0001 0 0.2 0.4 0.8 1.0 1.4 1.8 2.0 4.5 4.0 2.5 1.5 2.0 1.0 0.5 0 3.5 4.0 4.5 5.5 6.0 7.0 7.5 8.0 figure 7. output capacitance v cb , collector base voltage (v) 30 25 20 15 10 5.0 0 0.5 1.0 1.5 2.0 2.5 3.0 v be(sat) , base ? emitter saturation voltage (v) v be(on) , base ? emitter turn ? on voltage (v) v ce(sat) , collector ? emitter saturation voltage (v) c ibo , input capacitance (pf) c obo , output capacitance (pf) 0.7 i c /i b = 10 ? 55 c 25 c 150 c 0.8 v ce = 2.0 v 25 c 0.6 1.2 1.6 i c = 100 ma 80 ma 60 ma 40 ma 20 ma 3.0 3.5 5.0 5.0 6.5 c ib c ob ? 55 c 150 c
NST3904DP6T5G http://onsemi.com 4 package dimensions sot ? 963 case 527ad ? 01 issue b *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* dim min nom max millimeters a 0.34 0.37 0.40 b 0.10 0.15 0.20 c 0.07 0.12 0.17 d 0.95 1.00 1.05 e 0.75 0.80 0.85 e 0.35 bsc l 0.05 0.10 0.15 0.95 1.00 1.05 h e e b e d c a l c 0.08 h e 6x a 12 3 4 5 6 0.004 0.006 0.008 0.003 0.005 0.007 0.037 0.039 0.041 0.03 0.032 0.034 0.014 bsc 0.002 0.004 0.006 0.037 0.039 0.041 min nom max inches notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeters 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 0.35 0.014 0.20 0.08 mm inches scale 20:1 0.90 0.0354 0.35 0.014 0.20 0.08 a b b c on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. nst3904dp6/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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